• Change Log
  • Preface
  • 1Introduction
    • 1.1Terminology
      • 1.1.1Context
      • 1.1.2Versions
    • 1.2About This Document
      • 1.2.1Structure
      • 1.2.2Register Definition Format
    • 1.3Background
    • 1.4Supported Features
  • 2Reading Order
      • 2.0.1Halt/Resume
      • 2.0.2Abstract Register Access
      • 2.0.3Program Buffer
      • 2.0.4JTAG Debug Transport Module
      • 2.0.5System Bus Master
      • 2.0.6Reset
      • 2.0.7Security
      • 2.0.8Triggers
      • 2.0.9Serial Ports
  • 3System Overview
  • 4Debug Module (DM)
    • 4.1Debug Module Interface (DMI)
    • 4.2Reset Control
    • 4.3Selecting Harts
      • 4.3.1Selecting a Single Hart
      • 4.3.2Selecting Multiple Harts
    • 4.4Hart States
    • 4.5Run Control
    • 4.6Abstract Commands
      • 4.6.1Abstract Command Listing
    • 4.7Program Buffer
    • 4.8Overview of States
    • 4.9System Bus Access
    • 4.10Minimally Intrusive Debugging
    • 4.11Security
    • 4.12Debug Module Registers
  • 5RISC-V Debug
    • 5.1Debug Mode
    • 5.2Load-Reserved/Store-Conditional Instructions
    • 5.3Wait for Interrupt Instruction
    • 5.4Single Step
    • 5.5Reset
    • 5.7XLEN
    • 5.8Core Debug Registers
    • 5.9Virtual Debug Registers
  • 6Trigger Module
    • 6.1Native M-Mode Triggers
    • 6.2Trigger Registers
  • 7Debug Transport Module (DTM)
  • 8JTAG Debug Transport Module
    • 8.1JTAG Background
    • 8.2JTAG DTM Registers
    • 8.3Recommended JTAG Connector
  • Hardware Implementations
    • Abstract Command Based
    • Execution Based
  • Debugger Implementation
    • Debug Module Interface Access
    • Checking for Halted Harts
    • Halting
    • Running
    • Single Step
    • Accessing Registers
      • Using Abstract Command
      • Using Program Buffer
    • Reading Memory
      • Using System Bus Access
      • Using Program Buffer
      • Using Abstract Memory Access
    • Writing Memory
      • Using System Bus Access
      • Using Program Buffer
      • Using Abstract Memory Access
    • Triggers
    • Handling Exceptions
    • Quick Access
    • IDCODE (at 0x01)
    • DTM Control and Status (dtmcs, at 0x10)
    • Debug Module Interface Access (dmi, at 0x11)
    • BYPASS (at 0x1f)
    • Debug Control and Status (dcsr, at 0x7b0)
    • Debug PC (dpc, at 0x7b1)
    • Debug Scratch Register 0 (dscratch0, at 0x7b2)
    • Debug Scratch Register 1 (dscratch1, at 0x7b3)
    • Trigger Select (tselect, at 0x7a0)
    • Trigger Data 1 (tdata1, at 0x7a1)
    • Trigger Data 2 (tdata2, at 0x7a2)
    • Trigger Data 3 (tdata3, at 0x7a3)
    • Trigger Info (tinfo, at 0x7a4)
    • Trigger Control (tcontrol, at 0x7a5)
    • Machine Context (mcontext, at 0x7a8)
    • Supervisor Context (scontext, at 0x7aa)
    • Match Control (mcontrol, at 0x7a1)
    • Instruction Count (icount, at 0x7a1)
    • Interrupt Trigger (itrigger, at 0x7a1)
    • Exception Trigger (etrigger, at 0x7a1)
    • Trigger Extra (RV32) (textra32, at 0x7a3)
    • Trigger Extra (RV64) (textra64, at 0x7a3)
    • Debug Module Status (dmstatus, at 0x11)
    • Debug Module Control (dmcontrol, at 0x10)
    • Hart Info (hartinfo, at 0x12)
    • Hart Array Window Select (hawindowsel, at 0x14)
    • Hart Array Window (hawindow, at 0x15)
    • Abstract Control and Status (abstractcs, at 0x16)
    • Abstract Command (command, at 0x17)
    • Abstract Command Autoexec (abstractauto, at 0x18)
    • Configuration String Pointer 0 (confstrptr0, at 0x19)
    • Next Debug Module (nextdm, at 0x1d)
    • Abstract Data 0 (data0, at 0x04)
    • Program Buffer 0 (progbuf0, at 0x20)
    • Authentication Data (authdata, at 0x30)
    • Halt Summary 0 (haltsum0, at 0x40)
    • Halt Summary 1 (haltsum1, at 0x13)
    • Halt Summary 2 (haltsum2, at 0x34)
    • Halt Summary 3 (haltsum3, at 0x35)
    • System Bus Access Control and Status (sbcs, at 0x38)
    • System Bus Address 31:0 (sbaddress0, at 0x39)
    • System Bus Address 63:32 (sbaddress1, at 0x3a)
    • System Bus Address 95:64 (sbaddress2, at 0x3b)
    • System Bus Address 127:96 (sbaddress3, at 0x37)
    • System Bus Data 31:0 (sbdata0, at 0x3c)
    • System Bus Data 63:32 (sbdata1, at 0x3d)
    • System Bus Data 95:64 (sbdata2, at 0x3e)
    • System Bus Data 127:96 (sbdata3, at 0x3f)
      • Long Name (shortname, at 0x123)
      • Access Register
      • Quick Access
      • Access Memory
    • Privilege Level (priv, at virtual)
    • Serial Control and Status (sercs, at 0x34)
    • Serial TX Data (sertx, at 0x35)
    • Serial RX Data (serrx, at 0x36)