| Metadata Table | |
|---|---|
| Manual Type | user |
| Spec Revision | 20190305-Base-Ratification |
| Spec Release Date | March 2019 |
| Git Revision | IMFDQC-Ratification-20190305 |
| Git URL | https://github.com/riscv/riscv-isa-manual.git |
| Source | src/p.tex |
| Conversion Date | 2023/11/12 |
| License | CC-by-4.0 |
Discussions at the 5th RISC-V workshop indicated a desire to drop this packed-SIMD proposal for floating-point registers in favor of standardizing on the V extension for large floating-point SIMD operations. However, there was interest in packed-SIMD fixed-point operations for use in the integer registers of small RISC-V implementations. A task group is working to define the new P extension.