• Changes from v1.0-rc2
    • Clarified that this it the frozen version for public review.
  • 1Introduction
  • 2Implementation-defined Constant Parameters
  • 3Vector Extension Programmer’s Model
    • 3.1Vector Registers
    • 3.2Vector Context Status in mstatus
    • 3.3Vector Context Status in vsstatus
    • 3.4Vector type register, vtype
    • 3.5Vector Length Register vl
    • 3.6Vector Byte Length vlenb
    • 3.7Vector Start Index CSR vstart
    • 3.8Vector Fixed-Point Rounding Mode Register vxrm
    • 3.9Vector Fixed-Point Saturation Flag vxsat
    • 3.10Vector Control and Status Register vcsr
    • 3.11State of Vector Extension at Reset
  • 4Mapping of Vector Elements to Vector Register State
    • 4.1Mapping for LMUL = 1
    • 4.2Mapping for LMUL < 1
    • 4.3Mapping for LMUL > 1
    • 4.4Mapping across Mixed-Width Operations
    • 4.5Mask Register Layout
  • 5Vector Instruction Formats
    • 5.1Scalar Operands
    • 5.2Vector Operands
    • 5.3Vector Masking
    • 5.4Prestart, Active, Inactive, Body, and Tail Element Definitions
  • 6Configuration-Setting Instructions (vsetvli/vsetivli/vsetvl)
    • 6.2AVL encoding
    • 6.3Constraints on Setting vl
    • 6.4Example of stripmining and changes to SEW
  • 7Vector Loads and Stores
    • 7.1Vector Load/Store Instruction Encoding
    • 7.2Vector Load/Store Addressing Modes
    • 7.3Vector Load/Store Width Encoding
    • 7.4Vector Unit-Stride Instructions
    • 7.5Vector Strided Instructions
    • 7.6Vector Indexed Instructions
    • 7.7Unit-stride Fault-Only-First Loads
    • 7.8Vector Load/Store Segment Instructions
    • 7.9Vector Load/Store Whole Register Instructions
  • 8Vector Memory Alignment Constraints
  • 9Vector Memory Consistency Model
  • 10Vector Arithmetic Instruction Formats
    • 10.1Vector Arithmetic Instruction encoding
    • 10.2Widening Vector Arithmetic Instructions
    • 10.3Narrowing Vector Arithmetic Instructions
  • 11Vector Integer Arithmetic Instructions
    • 11.1Vector Single-Width Integer Add and Subtract
    • 11.2Vector Widening Integer Add/Subtract
    • 11.3Vector Integer Extension
    • 11.4Vector Integer Add-with-Carry / Subtract-with-Borrow Instructions
    • 11.5Vector Bitwise Logical Instructions
    • 11.6Vector Single-Width Shift Instructions
    • 11.7Vector Narrowing Integer Right Shift Instructions
    • 11.8Vector Integer Compare Instructions
    • 11.9Vector Integer Min/Max Instructions
    • 11.10Vector Single-Width Integer Multiply Instructions
    • 11.11Vector Integer Divide Instructions
    • 11.12Vector Widening Integer Multiply Instructions
    • 11.13Vector Single-Width Integer Multiply-Add Instructions
    • 11.14Vector Widening Integer Multiply-Add Instructions
    • 11.15Vector Integer Merge Instructions
    • 11.16Vector Integer Move Instructions
  • 12Vector Fixed-Point Arithmetic Instructions
    • 12.1Vector Single-Width Saturating Add and Subtract
    • 12.2Vector Single-Width Averaging Add and Subtract
    • 12.3Vector Single-Width Fractional Multiply with Rounding and Saturation
    • 12.4Vector Single-Width Scaling Shift Instructions
    • 12.5Vector Narrowing Fixed-Point Clip Instructions
  • 13Vector Floating-Point Instructions
    • 13.1Vector Floating-Point Exception Flags
    • 13.2Vector Single-Width Floating-Point Add/Subtract Instructions
    • 13.3Vector Widening Floating-Point Add/Subtract Instructions
    • 13.4Vector Single-Width Floating-Point Multiply/Divide Instructions
    • 13.5Vector Widening Floating-Point Multiply
    • 13.6Vector Single-Width Floating-Point Fused Multiply-Add Instructions
    • 13.7Vector Widening Floating-Point Fused Multiply-Add Instructions
    • 13.8Vector Floating-Point Square-Root Instruction
    • 13.9Vector Floating-Point Reciprocal Square-Root Estimate Instruction
    • 13.10Vector Floating-Point Reciprocal Estimate Instruction
    • 13.11Vector Floating-Point MIN/MAX Instructions
    • 13.12Vector Floating-Point Sign-Injection Instructions
    • 13.13Vector Floating-Point Compare Instructions
    • 13.14Vector Floating-Point Classify Instruction
    • 13.15Vector Floating-Point Merge Instruction
    • 13.16Vector Floating-Point Move Instruction
    • 13.17Single-Width Floating-Point/Integer Type-Convert Instructions
    • 13.18Widening Floating-Point/Integer Type-Convert Instructions
    • 13.19Narrowing Floating-Point/Integer Type-Convert Instructions
  • 14Vector Reduction Operations
    • 14.1Vector Single-Width Integer Reduction Instructions
    • 14.2Vector Widening Integer Reduction Instructions
    • 14.3Vector Single-Width Floating-Point Reduction Instructions
    • 14.4Vector Widening Floating-Point Reduction Instructions
  • 15Vector Mask Instructions
    • 15.1Vector Mask-Register Logical Instructions
    • 15.2Vector count population in mask vcpop.m
    • 15.7Example using vector mask instructions
    • 15.8Vector Iota Instruction
    • 15.9Vector Element Index Instruction
  • 16Vector Permutation Instructions
    • 16.1Integer Scalar Move Instructions
    • 16.2Floating-Point Scalar Move Instructions
    • 16.3Vector Slide Instructions
    • 16.4Vector Register Gather Instructions
    • 16.5Vector Compress Instruction
    • 16.6Whole Vector Register Move
  • 17Exception Handling
    • 17.1Precise vector traps
    • 17.2Imprecise vector traps
    • 17.3Selectable precise/imprecise traps
    • 17.4Swappable traps
  • 18Standard Vector Extensions
    • 18.1Zvl*: Minimum Vector Length Standard Extensions
    • 18.2Zve*: Vector Extensions for Embedded Processors
    • 18.3V: Vector Extension for Application Processors
  • 19Vector Instruction Listing
  • Appendix A: Vector Assembly Code Examples
    • A.1. Vector-vector add example
    • A.2. Example with mixed-width mask and compute.
    • A.3. Memcpy example
    • A.4. Conditional example
    • A.5. SAXPY example
    • A.6. SGEMM example
    • A.7. Division approximation example
    • A.8. Square root approximation example
    • A.9. C standard library strcmp example
  • Appendix B: Calling Convention (Not authoritative - Placeholder Only)
  • Appendix C: Fractional Lmul example